For comprehensive neuroscience research and related applications such as brain-computer-interfaces or brain-machine-interfaces (BCI or BMI), neuroprosthetics, etc., it is advantageous to provide simultaneous monitoring over a large number of channels in a small volume while maintaining high signal quality to help provide an in-depth understanding of brain activities. However, to facilitate a large number of parallel recordings with high electrical performance, both power and area consumptions inevitably increase dramatically, and therefore it has been recognized as one of the biggest challenges to overcome in neural multi-channel recordings and related applications. While some have attempted to achieve this goal, no previous approach has fully addressed both area and energy efficiency simultaneously to achieve massively-parallel multi-channel recordings.
Conventional approaches that attempt to effectively use area and energy typically use channel multiplexing and a successive approximation register analog-to-digital converter (SAR-ADC) as a quantizer in the recordings since there is no static power consumption in SAR-ADC and the switching power of the SAR-ADC can be significantly reduced by using smaller size capacitors and some special control schemes. Channel multiplexing is used sometimes as a compromising solution for the area reduction since the SAR-ADC consumes a relatively large area compared with other types of ADCs. However, channel multiplexing has serious shortcomings. The multiplexing itself needs high-speed buffers and switches which lead to additional power consumption. Additionally, the quality of the recording might be deteriorated since crosstalk between channels may occur. High-quality recording requiring more than 60 dB dynamic range (DR) can be affected by this crosstalk since modern CMOS switches only provide a few GΩ range off-resistance.